A semiconductor chip such as a DRAM (Dynamic Random Access Memory) is manufactured in a wafer unit by diffusion processing in a front-end process. A semiconductor wafer obtained in the front-end process is divided to produce many semiconductor chips in a post-process, as is well known. Therefore, in order to manufacture one semiconductor chip at lower cost, it is important to increase the number of semiconductor chips obtained from one semiconductor wafer and to improve productivity of the semiconductor chips obtained.
The increase in the number of semiconductor chips obtained from one semiconductor wafer can be achieved by decreasing the size of a chip area and increasing the size of a semiconductor wafer. The improvement in productivity of the semiconductor chips can be achieved by excluding various factors that degrade productivity, as far as possible, at many steps of the front-end process.
There are many complex factors that degrade productivity, and it is not always easy to pinpoint these factors. However, in a wafer state before a semiconductor wafer is divided into semiconductor chips, there are characteristics in positions where defects occur, depending on factors that degrade productivity of chips. For example, defects are concentrated at the external periphery of a semiconductor wafer, or defects are concentrated at one side of a semiconductor wafer, or a pass and a failure are repeated at every other chip. These characteristics become important keys to find factors that degrade productivity.
However, while it is relatively easy to specify a position of the occurrence of a defect in the wafer state before division into chips, it is considerably difficult to specify this position after the wafer is divided into individual chips by dicing. In order to obtain information concerning the position of the occurrence of a defect on the wafer, it is necessary to perform various operation tests to each semiconductor chip before the wafer is diced. This results in increasing the manufacturing cost of chips.
Semiconductor chips that are normal in the state before dicing will also become defective after the dicing. In this case, it is substantially impossible to obtain information concerning a position of the occurrence of the defect on the wafer.
In order to solve the above problems, Japanese Patent No. 3,555,859 discloses the following system proposed by the inventor of the present invention.
An address of a defect that occurs in a semiconductor chip which is replaced by a redundant memory cell array is stored in a database. With this arrangement, position information on the wafer can be obtained, even after the wafer is divided into individual semiconductor chips.
While many addresses of defective chips are present in a semiconductor memory such as a DRAM, defective addresses can be saved by replacing a memory cell corresponding to the defective addresses with a redundant memory cell. Because many defective addresses are saved per one semiconductor chip, a distribution of the defective addresses that have been replaced can be regarded as specific to the corresponding semiconductor chip in high probability.
Focusing attention on this point, the technique disclosed in Japanese Patent No. 3,555,859 makes it possible to obtain position information on a wafer, by storing defective addresses of each specified semiconductor chip into a database before dicing a wafer, and reading the defective addresses of the chip that has been replaced by roll calling.
As described above, according to the method disclosed in Japanese Patent Publication No. 3,555,859, a distribution of defective addresses is stored in a database, thereby making it possible to obtain position information on a wafer, without adding a special circuit to the semiconductor chip. Therefore, it is advantageous that the area of the chip is not increased.
However, the method disclosed in Japanese Patent No. 3,555,859 has a problem in that the database becomes large in proportion to the number of production of semiconductor chips. Therefore, while this problem is not so significant for a certain type of chips that are produced by a small number, the database becomes huge for types of semiconductor chips that are produced by large numbers. The huge database makes it difficult to share information. Furthermore, because a chip needs to be specified from among the huge database, a searching time becomes long, and accordingly, position information on a wafer cannot always be obtained efficiently.
According to the method disclosed in Japanese Patent No. 3,555,859, individual semiconductor chips are specified based on the distribution of defective addresses. Therefore, when the distribution of defective addresses of a certain semiconductor chip happens to be exactly the same as that of other semiconductor chip, it becomes difficult to distinguish between the two semiconductor chips.